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Week 2 ยท Lecture outline

What a board is made of, and first power-on

Learning goals

By the end of the week a student can:

  • Name the system-on-chip, DRAM, storage, regulators, clock and I/O ports, find each on the board and in its layout, and say what each contributes to booting.
  • Read the schematic and the layout as two views of one board.
  • Trace the 5 V input to every rail, and tell a buck converter from a linear regulator.
  • Explain why rails come up in sequence before reset is released.

Lecture 1, block 1: the system-on-chip

  • What a PC spreads over a motherboard, in one package: CPU cores, GPU, video engine, memory controller, on-chip SRAM, boot ROM, fuses and the I/O controllers.
  • Everything runs here; the boot ROM inside it is the first code to run.
  • So much of the board is its supporting cast: memory, storage, power and connectors.

Lecture 1, block 2: memory, storage, clock

  • DRAM: separate chips, volatile, unusable until software brings it up (week 4).
  • Storage: SPI NOR flash for the boot firmware, then the OS on a USB drive, microSD card or eMMC module.
  • A crystal: the reference clock that on-chip PLLs multiply to the CPU and bus clocks.
  • No clock and no reset release means no first instruction.

Lecture 1, block 3: I/O and the two boards compared

  • Each connector has a controller in the system-on-chip, often with a PHY or a hub between them.
  • Das Frite: one DDR4 chip on a 16-bit bus and no card slot, to stay small and low cost.
  • Solitude: wider LPDDR4, a USB 3.0 hub, and camera and display connectors.
  • Schematic says what connects to what; layout says where each part sits and where each trace runs.

Lecture 2, block 1: one input, many rails

  • Both boards take 5 V over USB Type-C.
  • CPU cores, the rest of the chip's logic, its I/O and the memory each need their own rail.
  • Buck converters step voltage down efficiently for heavy loads; linear regulators (LDOs) are simpler and quieter for small ones.
  • The CPU rail is adjustable, so the OS can lower the voltage with the clock.

Lecture 2, block 2: sequencing and reset

  • Rails must rise in a set order.
  • The chip is held in reset until they are stable; a reset supervisor or a power-good signal decides when it is released.
  • Then the crystal is running and the CPU fetches its first instruction from the boot ROM.
  • Show the power-on order: on Das Frite from module 2's rail table; on Solitude from the power viewer and the supplied power-up traces.

Lecture 2, block 3: measuring safely

  • The header is 3.3 V; the pinout colours supply pins by voltage.
  • Measure rails at test points with the multimeter; a slipped probe can short a rail.
  • Board current with an inline USB power meter, at idle and under load.
  • Charts of measurements start their axis at zero, with the unit in the axis title.

Board demo

  1. Open the board's layout viewer and find the system-on-chip, the DRAM, the SPI NOR flash and a regulator; hold the real board up beside it.
  2. Open the power viewer and follow the 5 V input to the CPU rail.
  3. Put the USB power meter in line with the board while it is unplugged, power on, and read the current at idle and then under a CPU load.

Check questions

When would a board designer use a buck converter rather than a linear regulator for a rail?

For a rail that carries a lot of current, such as the CPU rail: a buck converter switches to step the voltage down efficiently. A linear regulator is simpler and quieter, and suits small loads.

What decides when the system-on-chip leaves reset, and why does it matter?

A reset supervisor or a power-good signal holds the chip in reset until the rails are stable. Releasing it earlier would start the CPU on supplies that are not yet at their voltage.